Please use this identifier to cite or link to this item:
https://hdl.handle.net/20.500.12008/47960
How to cite
Title: | NanoWatt, sub-nS OTAs, with sub-10mV input offset, using series-parallel current copiers. |
Authors: | Arnaud, Alfredo Fiorelli, Rafaella Galup-Montoro, Carlos |
Type: | Preprint |
Keywords: | Mirrors, Transconductance, Voltage, Circuit noise, Noise reduction, Linearity, Transconductors, MOSFETs, Circuit topology, Filters |
Issue Date: | 2006 |
Abstract: | In this paper, series-parallel (SP) current-division will be employed for the design of very
low transconductance OTAs. From the theory and measurements, it will be shown that SP
mirrors allow building current copiers with copy factors of thousands, without reducing
matching or noise performance. SP mirrors will be applied to the design of OTAs ranging
from 33pS to a few nS, with up to 1V linear range, consuming in the order of 100nW, and
with a reduced area. An integrated 3.3s time-constant integrator will also be presented.
Several design concerns will be revised: linearity, offset, noise, leakages; as well as layout
techniques. A final comparative analysis concludes that SP-association of transistors
allows the design of very efficient transconductors, for demanding applications in the field
of implantable electronics among others. |
Description: | Publicado en IEEE Journal of Solid-State Circuits, vol. 41, no. 9, con el título Nanowatt, Sub-nS OTAs, With Sub-10-mV Input Offset, Using Series-Parallel Current Mirrors. |
Citation: | Arnaud, A., Fiorelli, R. y Galup-Montoro, C. NanoWatt, sub-nS OTAs, with sub-10mV input offset, using series-parallel current copiers [Preprint] Publicado en: IEEE Journal of Solid-State Circuits, v.41, no. 9, 2006, pp. 2009-2018. DOI: 10.1109/JSSC.2006.880606. |
Appears in Collections: | Publicaciones académicas y científicas - Instituto de Ingeniería Eléctrica |
This item is licensed under a Creative Commons License