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| Título: | High CMRR power efficient neural recording amplifier architecture |
| Autor: | Castro Lisboa, Pablo Silveira, Fernando |
| Tipo: | Ponencia |
| Descriptores: | Electrónica |
| Fecha de publicación: | 2011 |
| Resumen: | This work presents an architecture of neural record- ing amplifier based on a modified differential difference amplifier (DDA). The proposed circuit improves the performance with respect to capacitive feedback neural amplifiers and standard DDA based amplifiers by taking advantage of the high CMRR achievable in a DDA without jeopardizing the power con- sumption. In addition a novel technique for rejecting the DC component at the output of the amplifier and fixing the low cut-off frequency is described. The expected performance of the circuit is checked by Monte Carlo simulation, achieving 48dB gain in a 250Hz-8kHz bandwidth, with higher than 107dB CMRR (@5kHZ), 2.4Vrms input noise and 4.2 noise efficiency factor at a total current consumption of 16.5A from a 3.3V power supply in a 0.5m CMOS technology |
| Descripción: | Trabajo presentado al 2011 IEEE International Symposium of Circuits and Systems (ISCAS), Rio de Janeiro, Brazil. |
| Citación: | Castro, P, Silveira, F. "High CMRR power efficient neural recording amplifier architecture" Publicado en: Proceedings of the IEEE International Symposium of Circuits and Systems (ISCAS), Rio de Janeiro, Brazil, 2011, pp. 1700-1703, doi: 10.1109/ISCAS.2011.5937909. |
| Licencia: | Licencia Creative Commons Atribución - No Comercial - Sin Derivadas (CC - By-NC-ND 4.0) |
| Aparece en las colecciones: | Publicaciones académicas y científicas - Instituto de Ingeniería Eléctrica |
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| Fichero | Descripción | Tamaño | Formato | ||
|---|---|---|---|---|---|
| CS11.pdf | 261,7 kB | Adobe PDF | Visualizar/Abrir |
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