Common source LNA design space exploration in all inversion regions

Abstract

This work presents a design space exploration procedure valid in all inversion regions, from weak to strong, applied to the design of a CMOS CS-LNA. The exploration is done in terms of current consumption, gain and noise figure in the design space (ID, gm/ID) providing insight into the trade-offs in the selection of the inversion level of the main LNA transistor. Finally comparisons between the MATLAB design space exploration and BSIM3v3 simulations using Spectre-RF are done, through the design example of a 900MHz CS-LNA implemented in a 0,35 um CMOS technology.

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