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Title: | NeuroFPGA : Implementing artificial neural networks on programmable logic devices |
Authors: | Ferrer, Daniel González, Ramiro Fleitas, Roberto Pérez Acle, Julio Canetti, Rafael |
Type: | Artículo |
Keywords: | Artificial neural networks, Programmable logic devices, Circuit testing |
Descriptors: | SISTEMAS y CONTROL |
Issue Date: | 2004 |
Abstract: | An FPGA implementation of a multilayer perceptron neural network is presented. The system is parameterized both in network related aspects (e.g.: number of layers and number of neurons in each layer) and implementation parameters (e.g.: word width, pre-scaling factors and number of available multipliers). This allows to use the design for different network realizations, or to try different area-speed trade-offs simply by recompiling the design. Fixed point arithmetic with pre-scaling configurable in a per layer basis was used. The system was tested on an ARC-PCI board from altera/spl trade/ several examples from different application domains were implemented showing the flexibility and ease of use of the obtained circuit. Even with the rather old board used, an appreciable speed-up was obtained compared with a software-only implementation based on Matlab neural network toolbox. |
Publisher: | IEEE |
Citation: | Ferrer, D., González, R, Fleitas, Roberto, Pérez Acle, J., Canetti, R. NeuroFPGA : Implementing artificial neural networks on programmable logic devices [en línea] Design, Automation and Test in Europe Conference and Exhibition, Paris, France, 2004 |
Appears in Collections: | Publicaciones académicas y científicas - Instituto de Ingeniería Eléctrica |
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