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Please use this identifier to cite or link to this item: https://hdl.handle.net/20.500.12008/20774 How to cite
Title: Fully-Depleted SOI CMOS Technology for Low-Voltage Low-Power Mixed Digital/Analog/Microwave Circuits
Authors: Flandre, Denis
Colinge, J. P
Chen, J
De Ceuster, D
Eggermont, J. P
Ferreira, L
Gentinne, B
Jespers, Paul
Viviani, A
Gillon, R
Raskin, J. P
Vander Vorst, A
Valiente, Gabriel
Silveira, Fernando
Type: Artículo
Descriptors: ELECTRÓNICA
Issue Date: 1999
Abstract: This paper demonstrates that fully-depleted (FD) silicon-on-insulator (SOI) technology offers unique opportunities in the field of low-voltage, low-power CMOS circuits. Beside the well-known reduction of parasitic capacitances due to dielectric isolation, FD SOI MOSFETs indeed exhibit near-ideal body factor, subthreshold slope and current drive. These assets are both theoretically and experimentally investigated. Original circuit studies then show how a basic FD SOI CMOS process allows for the mixed fabrication and operation under low supply voltage of analog, digital and microwave components with properties significantly superior to those obtained on bulk CMOS. Experimental circuit realizations support the analysis.
Publisher: Kluwer
IN: Analog Integrated Circuits and Signal Processing, 1999, v. 21
Citation: Flandre, Denis, Colinge, J. P., Chen, J., De Ceuster, D., Eggermont, J. P., Ferreira, L., Gentinne, B., Jespers, Paul, Viviani, A., Gillon, R., Raskin, J. P., Vander Vorst, A., Valiente, Gabriel, Silveira, Fernando. Fully-Depleted SOI CMOS Technology for Low-Voltage Low-Power Mixed Digital/Analog/Microwave Circuits [en línea] Analog Integrated Circuits and Signal Processing, 1999, v. 21
Academic department: Electrónica
Electrónica
Investigation group: Electrónica Aplicada
Microelectrónica
Appears in Collections:Publicaciones académicas y científicas - Instituto de Ingeniería Eléctrica

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