| Metadato | Etiqueta | Valor | Idioma |
|---|---|---|---|
| dc.contributor.author | Autor | Silveira, Fernando | es |
| dc.contributor.author | Autor | Flandre, Denis | es |
| dc.contributor.author | Autor | Jespers, Paul | es |
| dc.date.accessioned | Fecha ingreso | 2019-05-29T15:27:58Z | - |
| dc.date.available | Fecha disponible | 2019-05-29T15:27:58Z | - |
| dc.date.issued | Año de publicación | 1996 | es |
| dc.date.submitted | Fecha de subida | 20190528 | es |
| dc.description.abstract | Resumen | A new design methodology based on a unified treatment of all the regions of operation of the MOS transistor is proposed. It is intended for the design of CMOS analog circuits and especially suited for low power circuits where the moderate inversion region often is used because it provides a good compromise between speed and power consumption. The synthesis procedure is based on the relation between the ratio of the transconductance over dc drain current g m / I D and the normalized current Io /( W/L). The gm /ID indeed is a universal characteristic of all the transistors belonging to a same process. It may be derived from experimental measurements and fitted with simple analytical models. The method was applied successfully to the design of a silicon-on-insulator (SOI) micropower operational transconductance amplifier (OTA). | es |
| dc.identifier.citation | Citación | Silveira, Fernando, Flandre, Denis, Jespers, Paul. A gm/ID based methodology for the design of CMOS analog circuits and its application to the synthesis of a silicon-on-insulator micropower OTA [en línea] IEEE Journal of Solid-State Circuits, 1996, v.31, no. 9 | es |
| dc.identifier.uri | URI | https://hdl.handle.net/20.500.12008/20723 | - |
| dc.language | metadata.dc.language | en | es |
| dc.publisher | Editorial | IEEE | es |
| dc.relation.ispartof | EN | IEEE Journal of Solid-State Circuits, 1996, v.31, no. 9 | es |
| dc.rights | Derechos | Las obras depositadas en el Repositorio se rigen por la Ordenanza de los Derechos de la Propiedad Intelectual de la Universidad De La República. (Res. Nº 91 de C.D.C. de 8/III/1994 – D.O. 7/IV/1994) y por la Ordenanza del Repositorio Abierto de la Universidad de la República (Res. Nº 16 de C.D.C. de 07/10/2014) | es |
| dc.subject.other | Descriptores | ELECTRÓNICA | es |
| dc.title | Título | A gm/ID based methodology for the design of CMOS analog circuits and its application to the synthesis of a silicon-on-insulator micropower OTA | es |
| dc.type | Tipo de documento | Artículo | es |
| udelar.academic.department | Departamento académico | Electrónica | - |
| udelar.academic.department | Departamento académico | Electrónica | - |
| udelar.investigation.group | Grupo de investigación | Electrónica Aplicada | - |
| udelar.investigation.group | Grupo de investigación | Microelectrónica | - |
Colecciones:
| Ficheros | Descripción | Tamaño | Formato | ||
|---|---|---|---|---|---|
| Este ítem no contiene archivos | |||||