Título:
Analysis and implementation of low-cost FPGA-based digital pulse-width modulators
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Autor:
Pérez Acle, Julio
Eirea, Gabriel
Sotta, Gonzalo
de León, Ignacio
Eirea, Gabriel
Sotta, Gonzalo
de León, Ignacio
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Tipo de documento:
Ponencia
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Palabras clave:
DPWM
FPGA
Serdes
LVDS
FPGA
Serdes
LVDS
Descriptores:
Electrónica
Año de publicación:
2014
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Resumen:
This paper describes the architecture and operating principles of two digital pulse-width modulator (DPWM) implementations for low-cost field-programmable gate arrays (FPGAs). Both architectures are based on a counter-comparator block to process the most significant bits (MSB) portion of the reference input, enriched with additional elements to enhance duty-cycle resolution according to the less significant bits (LSB). The first architecture described has already been reported in the literature, it uses the on-chip PLL blocks to generate fixed delays and a selector to choose the one corresponding with the desired duty-cycle. Post-fitting adjustments of PLL delays are required to compensate delay differences between the diverse signal paths across the selector. In the second architecture described, a serializer-deserializer (SERDES) module is used to serialize a thermometer-coded representation of the LSB portion of the input. This serialization technique is commonly used for data transmission on high-speed serial I/O data transmission standards like LVDS and is extensively supported by FPGA providers. Experimental results are presented for both architectures synthesized on standard low-cost FPGA chips, showing very good linearity and resolutions up to 1ns. The first architecture provides a moderately better resolution. The second architecture, on the other hand, is a much more robust solution as it requires no post-fitting delay adjustments
Descripción:
Trabajo presentado a International Instrumentation and Measurement Technology Conference (I2MTC) Proceedings, Montevideo, Uruguay, 12-15 may., 2014
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Citación:
León, I de, Sotta, G, Eirea, G, Pérez Acle, J. "Analysis and implementation of low-cost FPGA-based digital pulse-width modulators" Publicado en: Proceedings of the International Instrumentation and Measurement Technology Conference (I2MTC) Montevideo, Uruguay, 2014, pp. 1523-1528, doi: 10.1109/I2MTC.2014.6861000.
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Departamento académico:
Electrónica
Grupo de investigación:
Electrónica Aplicada
Licencia:
Licencia Creative Commons Atribución - No Comercial - Sin Derivadas (CC - By-NC-ND 4.0)
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| Ficheros | Descripción | Tamaño | Formato | ||
|---|---|---|---|---|---|
| DSEP.pdf | — | 192.11 KB | Adobe PDF |