Título:
All-inversion region gm/ID methodology for RF circuits in FinFET technologies
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Autor:
Fiorelli, Rafaella
Núñez, Juan
Silveira, Fernando
Núñez, Juan
Silveira, Fernando
Tutor:
Tipo de documento:
Ponencia
Editor:
Palabras clave:
FinFETs
Capacitance
Radio frequency
Inductors
Phase noise
Capacitance
Radio frequency
Inductors
Phase noise
Descriptores:
Año de publicación:
2018
Contenido:
Resumen:
In the context of IoT applications, together with the use of deep-submicron technologies as FinFET, this paper presents a revision of the gm/ID methodology for radio-frequency analog front-end circuits. Particularly, this methodology is applied for the design of LC-VCOs in the 5.8-GHz band using 20-nm FinFET transistors. To incorporate the FinFET model into the design flow, a semi-empirical model is extracted from electrical simulations. To show the good performance of the methodology, an LC-VCO design, picked from the calculated design maps, is electrically simulated, achieving good match regarding oscillation frequency and phase noise
Descripción:
Presentado y publicado en International New Circuits and Systems Conference (NEWCAS), Montreal, QC, Canada, 2018
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Citación:
Fiorelli, R, Núñez, J, Silveira, F. "All-inversion region gm/ID methodology for RF circuits in FinFET technologies" Publicado en: Proceedings of the 16th IEEE International New Circuits and Systems Conference (NEWCAS), Montreal, QC, Canada, 24-27 jun., 2018, pp. 170-173, doi: 10.1109/NEWCAS.2018.8585627
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Departamento académico:
Electrónica
Grupo de investigación:
Microelectrónica
Licencia:
Licencia Creative Commons Atribución - No Comercial - Sin Derivadas (CC - By-NC-ND 4.0)
Colecciones:
| Ficheros | Descripción | Tamaño | Formato | ||
|---|---|---|---|---|---|
| FNS2018.pdf | — | 179.65 KB | Adobe PDF |
