Título:
A time-to-digital converter implemented on a xilinx zynq system-on-chip
Otros títulos:
Coordinador:
Director:
Compilador:
Autor:
Solari, Alfredo
Tutor:
Oliver, Juan Pablo
Tipo de documento:
Tesis de maestría
Editor:
Palabras clave:
FPGA
Time-to-digital converter
Digital design
Time-to-digital converter
Digital design
Descriptores:
Año de publicación:
2026
Contenido:
Resumen:
Time-to-Digital Converters (TDCs) are precise time interval measurement devices with applications across medical, industrial, and scientific fields. Systems that rely on Time-to-Digital conversion, ranging from 3D mapping and distance measurement to various forms of tomography, benefit from continuous improvements in resolution and precision. Currently, the state-of-the-art in this field is divided into two main branches : Field Programmable Gate Array (FPGA)-based and Application-Specific Integrated Circuit (ASIC)-based implementations. As in many other domains, ASICs offer the highest performance, while FPGAs provide the greatest versatility. The latter enables rapid exploration of new methods and techniques to improve resolution while keeping the same hardware. This thesis is structured into three main parts: (1) a study of the state-of-the-art in applications and implementations of Tapped Delay Line (TDL)–based TDCs; (2) the development of a simulator for the design and evaluation of TDL architectures; and (3) the implementation of a TDC achieving picosecond-level precision on low-cost programmable logic, specifically the Zynq-7000 series. This work analyzes the state-of-the-art in TDCs, with special emphasis on TDL architectures due to their versatility. It also provides a comprehensive overview of diverse applications to illustrate the impact of this technology across a wide range of fields. Additionally, the thesis introduces a custom Python-based simulator for TDLbased TDCs, which can be installed using the pip package manager. The simulator allows modeling aspects of TDC behavior that are difficult or impossible to visualize within the Xilinx Vivado Suite design flow. Finally, the main result of the thesis is the implementation of both single-sampling and dual-sampling TDCs, including calibration and software integration with the Pynq interface, allowing time measurements to be accessed directly from Python code. This was implemented using low-cost hardware (Zynq-7020). The implemented TDCs achieve average resolutions of 15.7 ps for the single-sampling TDC and 7.83 ps for the dual-sampling TDC. Their integral non-linearity ranges from 18.9 ps to 348 ps and from 7.79 ps to 553 ps, while their differential non-linearity ranges from −15.7 ps to 27.1 ps and from −7.82 ps to 25.9 ps for the single- and dual-sampling configurations, respectively.
Descripción:
Editorial:
Udelar.FI.
EN:
Financiadores:
Beca de Maestría ANII
Citación:
Solari, A. A time-to-digital converter implemented on a xilinx zynq system-on-chip [en línea]. Tesis de maestría. Montevideo : Udelar. FI. IIE, 2026.
Citación:
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Documento del Gobiberno:
URI:
https://www.colibri.udelar.edu.uy/handle/20.500.12008/56726
ISBN:
e-ISBN:
ISSN:
1688-2806
ISMN:
Otros identificadores:
Título Obtenido:
Facultad de Ingeniería::Títulos de Posgrado::Magíster en Ingeniería Eléctrica
Facultad o Servicio que otorga el Título:
Universidad de la República (Uruguay). Facultad de Ingeniería
Licencia:
Attribution-NonCommercial-NoDerivatives 4.0 International
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| Ficheros | Descripción | Tamaño | Formato | ||
|---|---|---|---|---|---|
| Sol26.pdf | Tesis de maestría | 5.83 MB | Adobe PDF |
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